Field of the Invention
The present invention relates to a wafer processing method for dividing a wafer into individual device chips along a plurality of crossing division lines by applying a laser beam to the wafer, the front side of the wafer being partitioned by the division lines to define a plurality of separate regions where a plurality of devices corresponding to the device chips are formed.
Description of the Related Art
A plurality of devices such as integrated circuits (ICs), large-scale integrations (LSIs), and light-emitting diodes (LEDs) are formed on the front side of a wafer so as to be separated from each other by a plurality of division lines. The wafer thus having the devices on the front side is divided into individual device chips by a laser processing apparatus. The device chips thus obtained are used in electrical equipment such as mobile phones, personal computers, and illumination equipment (see Japanese Patent Laid-open No. Hei 10-305420, for example). The laser processing apparatus is composed generally of a chuck table for holding a workpiece, laser beam applying means having focusing means for applying a laser beam to the workpiece held on the chuck table, and feeding means for relatively feeding the chuck table and the laser beam applying means, whereby the laser beam is applied along each division line formed on a wafer as the workpiece with high accuracy, thereby dividing the wafer along each division line.
Further, in general, a laser processing apparatus is classified into a type such that a laser beam having an absorption wavelength to the workpiece is applied to perform ablation as described in Japanese Patent Laid-open No. Hei 10-305420 and a type such that a laser beam having a transmission wavelength to the workpiece is applied in the condition where the focal point of the laser beam is set inside the workpiece, thereby forming a modified layer (see Japanese Patent No. 3408805, for example). In either type, however, the laser beam must be applied plural times (in plural passes) along each division line, so as to completely cut the wafer, causing a reduction in productivity.
To cope with this problem, the present applicant has developed and proposed a technique of forming a plurality of shield tunnels along each division line, wherein each shield tunnel extends from the front side of a wafer to the back side thereof, and each shield tunnel is composed of a fine hole and an amorphous region surrounding the fine hole (see Japanese Patent Laid-open No. 2014-221483, for example), thereby improving the production efficiency.